Ph.D. Dissertation Defense by Xiaojin Wei
Friday, November 12, 2004
(Dr. Yogendra Joshi, Chair)
"Stacked Microchannel Heat Sinks for Liquid Cooling of Microelectronics Devices"
A stacked microchannel heat sink was developed to provide efficient cooling
at a relatively low pressure drop while maintaining chip temperature uniformity.
Microfabrication techniques were employed to fabricate the stacked microchannel
structure, experiments were conducted to study its thermal performance. A
total thermal resistance of less than 0.1 K/W was demonstrated for both counter
flow and parallel flow configurations. The effects of flow direction and
interlayer flow rate ratio were investigated. It was found for the low flow
rate range that the parallel flow arrangement results in a better overall
thermal performance than counter flow arrangement; whereas, for the large
flow rate range, the total thermal resistances for both the counter flow
and parallel flow configurations are indistinguishable. On the other hand,
the counter flow arrangement provides better temperature uniformity for the
entire flow rate range tested. The effects of localized heating on the overall
thermal performance were examined by selectively applying electrical power
to the heaters. Numerical simulations were conducted to study the conjugate
heat transfer inside the stacked microchannels. Negative heat flux conditions
were found near the outlets of the microchannels for the counter flow arrangement.
This is particularly evident for small flow rates. The numerical results
clearly explain why the total thermal resistance for counter flow arrangement
is larger than that for the parallel flow at low flow rates.
In addition, laminar flow inside the microchannels were characterized using Micro-PIV techniques. Microchannels of different width were fabricated in silicon, the smallest channel measuring 34 µm in width. Measurements were conducted at various channel depths. Measured velocity profiles at these depths were found to be in reasonable agreement with laminar flow theory. An interesting result from Micro-PIV measurement is that the maximum velocity is not located at the midplane of the channel depth but shifted significantly towards the top of the microchannels. This is due to the slight sidewall slope, a common issue faced with DRIE etching. Numerical simulations were conducted to investigate the effects of the sidewall slope on the flow and heat transfer. The results show that the effect of large sidewall slope on heat transfer are significant; whereas the effect on pressure drop is not as pronounced.